1. Field of the Invention
The present invention relates to digital displays and more particularly to an improved method and system for verifying that the information conveyed by such a display is correct.
2. Prior Art
Many electronic devices include displays of information in digital form. Commercial weighing scales, for example, often include numerical displays of price and weight. A typical display includes a set of indicators, each comprising an array of information conveying segments. Seven such segments can be arranged and operated to display any number from 0 to 9. Four of the segments are oriented vertically as spaced vertical pairs and the remaining three segments are disposed horizontally at the top, center, and bottom of the array.
It is important for the user to be certain that each segment of such a display functions properly. For example, if an "8" is to be displayed and the central horizontal segment fails to operate properly, a "0" will be indicated. For this reason, automatic display verification is now included as an integral part of some food weighing scales. In West Germany such verification is legally mandated for food scales.
Systems for verifying the functioning of all segments comprising a display have been suggested. One such system is described in U.S. Pat. No. 4,159,521 issued June 26, 1979, assigned to the assignee of the present invention.
The apparatus disclosed in that application includes circuitry which when actuated presents predetermined information signals to the display. For example, all eights may be presented to and viewed on the display for verification that all segments properly respond to the predetermined information signals. The system also includes circuitry for removing information signals from all segments of the display to insure that no segment continues to respond after the signal is removed. This technique for verification requires the user to both initiate the verification and to interpret the results displayed. This scheme dependent on user actuation fails, moreover, to comply with laws requiring automatic verification.
A second suggested verification scheme is shown in U.S. Pat. No. 3,866,171 which has also been assigned to the assignee of the present invention. The technique disclosed in the U.S. Pat. No. 3,866,171 is that of verifying that energization signals applied to display segments generate voltages across the segments within certain ranges. If the voltage falls within one range the segment is assumed to be on. If the voltage is not in that range, the segment is either assumed to be off or malfunctioning depending upon the specific voltage across the segment. This technique of display verification is useful but has in the past been accomplished in a somewhat complex manner.
The display verification apparatus shown in the U.S. Pat. No. 3,866,171 comprises a number of parallel circuit arrangements each utilizing a separate amplifier circuit to verify the functioning of a display segment. These parallel circuits provide a number of concurrent signals to a comparator which compares the signal to an appropriate one of a set of reference signal inputs to the comparator. If the comparator inputs are equal, the display is properly functioning and can be utilized to display information. If any segment is malfunctioning, however, the comparator indicates that fact by displaying an error signal.
The amount of hard wire circuitry utilized to accomplish verification as disclosed in the U.S. Pat. No. 3,866,171 is substantial since each segment has its own circuit for sending an appropriate signal to the comparator. Further, if an error exists in data transmitted to the display, this error is transmitted to the comparator and will not be detected. The system embodied by the '171 patent does not, therefore, determine whether circuitry external to the display is accurately transmitting data to that display.